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Www M Wife En Horn%C3%AD Kounice Floating Gate MOSFET - pedia, the free encyclopedia

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[edit] History

The first report of a Floating Gate MOSFET was made by Kahng and Sze,^[1] and dates back to 1967. The first application of the FGMOS was to store digital data in EEPROM, EPROM and FLASH memories. However, the current interest in FGMOS circuits started from developing large-scale computations in neuromorphic systems, which are inherently analog.

In 1989 Intel employed the FGMOS as an analog nonvolatile memory element in his ETANN chip,^[2] demonstrating the potential of using FGMOS devices for applications other than digital memory.

Three research accomplishments laid the groundwork for much of the current FGMOS circuit development:

1. Thomsen and Brooke's demonstration and use of electron tunneling in a standard CMOS double-poly process^[3] allowed many researchers to investigate FGMOS circuits concepts without requiring access to specialized fabrication processes.
2. The νMOS, or neuron-MOS, circuit approach by Shibata and Ohmi^[4] provided the initial inspiration and framework to use capacitors for linear computations. These researchers concentrated on the FG circuit properties instead of the device properties, and used either UV light to equalize charge, or simulated FG elements by opening and closing MOSFET switches.
3. Carver Mead's adaptive retina^[5] gave the first example of using continuously-operating FG programming/erasing techniques, in this case UV light, as the backbone of an adaptive circuit technology.

[edit] Structure

An FGMOS can be fabricated by electrically isolating the gate of a standard MOS transistor, so that there are no resistive connections to its gate. A number of secondary gates or inputs are then deposited above the floating gate (FG) and are electrically isolated from it. These inputs are only capacitively connected to the FG, since the FG is completely surrounded by highly resistive material. So, in terms of its DC operating point, the FG is a floating node.

[edit] Theory of Operation

[edit] Large Signal DC

The equations modeling the DC operation of the FGMOS can be derived from the equations that describe the operation of the MOS transistor used to build the FGMOS. If it is possible to determine the voltage at the FG of an FGMOS device, it is then possible to express its drain to source current using standard MOS transistor models. Therefore, in order to derive a set of equations that model the large signal operation of an FGMOS device, it is necessary to find the relationship between its effective input voltages and the voltage at its FG.

[edit] Small Signal

An N-input FGMOS device has N-1 more terminals than a MOS transistor, and therefore, N+2 small signal parameters can be defined: N effective input transconductances, an output transconductance and a bulk transconductance. Respectively:

These equations show two drawbacks of the FGMOS compared with the MOS transistor:

• Reduction of the input transconductance.
• Reduction of the output resistance.

[edit] Noise

The sources of noise in the FGMOS are the same as in the MOS transistor. However, the equivalent noise at the input of the FGMOS will be different, since the signal at the FG is attenuated.

[edit] Charge Accumulation

[edit] Design and Simulation